Develop TDM Protocol for ADC-UART with stm32
Budget: ₹12,500 – ₹37,500 INR
I need a seasoned embedded engineer to design and implement a lean Time-Division Multiplexing protocol that funnels several high-speed ADC channels into a single, reliable UART stream. The end goal is clear: squeeze the maximum possible throughput out of the link without sacrificing data integrity.
The work revolves around three core competencies—TDM protocol development, raw ADC data handling, and low-level UART communication—so fluency in each of these areas is essential. Our front-end hardware already produces digitised samples via a bespoke analog-to-digital conversion stage; your task is to move those samples efficiently over UART, interleaving them with tight framing, minimal overhead, and built-in error checking.
Key deliverables
• Well-documented C/C++ (or equivalent) firmware that implements the new TDM layer
• A concise protocol specification covering frame format, timing, and error-handling strategy
• Bench test report demonstrating sustained, error-free operation at the target throughput on representative hardware
Acceptance criteria
1. Sustained transfer rate meets or exceeds the current theoretical UART limit with ≤2 % overhead.
2. No data loss or corruption observed during 24 h continuous run at full-scale sample rate.
3. Code compiles cleanly with our standard embedded toolchain and is handed over under a permissive licence.
If you have shipped similar multiplexed data pipelines before—especially where every microsecond and byte matters—I would love to see how you’d tackle this.
The work revolves around three core competencies—TDM protocol development, raw ADC data handling, and low-level UART communication—so fluency in each of these areas is essential. Our front-end hardware already produces digitised samples via a bespoke analog-to-digital conversion stage; your task is to move those samples efficiently over UART, interleaving them with tight framing, minimal overhead, and built-in error checking.
Key deliverables
• Well-documented C/C++ (or equivalent) firmware that implements the new TDM layer
• A concise protocol specification covering frame format, timing, and error-handling strategy
• Bench test report demonstrating sustained, error-free operation at the target throughput on representative hardware
Acceptance criteria
1. Sustained transfer rate meets or exceeds the current theoretical UART limit with ≤2 % overhead.
2. No data loss or corruption observed during 24 h continuous run at full-scale sample rate.
3. Code compiles cleanly with our standard embedded toolchain and is handed over under a permissive licence.
If you have shipped similar multiplexed data pipelines before—especially where every microsecond and byte matters—I would love to see how you’d tackle this.