TCAD SENTAURUS design and Simulation of 50 nm Gate Length MOSFET with varying Gate Thickness

Need a *TCAD SENTAURUS* expert who can design and Simulation 50 nm Gate Length MOSFET and creathe the graphs of Ids/Vgs characteristics of NMOS/PMOS at various gate oxide thickness. The parameters under investigation are the threshold voltage, subthreshold slope, on-state current, leakage current and drain induced barrier lowering (DIBL) by varying channel doping concentration, drain and source doping concentration and gate oxide thickness.