Sky130 CMOS Inverter Tape-out

I need a complete, fabrication-ready Sky130 CMOS inverter, built for a commercial product. The work starts with a clean schematic and ends with a sign-off GDSII that has passed all standard checks. I will be reviewing each stage—schematic entry, SPICE simulation, layout in Magic or KLayout, DRC/LVS with Open PDK tools, parasitic extraction, timing and power verification—so every file must be reproducible in an open-source flow (OpenROAD, Skywater-PDK, ngspice, Netgen, etc.).

Deliverables
• Clean schematic and simulation deck showing correct VOH, VOL, propagation delay and noise margin for a 1.8 V supply
• Layout (MAG or GDS) that matches the schematic and clears Sky130 DRC without waivers
• LVS, PEX and corresponding reports confirming connectivity and parasitics
• Final GDSII plus documented steps to reproduce results on a fresh Docker or Conda environment

Acceptance is complete when I can rerun the flow on my end, obtain the same metrics, and push the GDS straight to the foundry.