Simple Evaluation Board Layout / Routing with Cadsoft Eagle 7.7

I have designed the schematic for a simple evaluation board for the LMK1D1212 and the LMK04821.
I need someone to perform the layout / routing using Cadsoft Eagle 7.7.
The board is for testing digital components, specifically clock buffers.

Requirements:
- Use Cadsoft Eagle 7.7
- 4 Layers
- Does not have to be pretty, just functional
- Keep clock lines short and bypass capacitors close
- Leave some space between the functional 2 main chips

Ideal Skills & Experience:
- Proficiency in Cadsoft Eagle

Please provide examples of similar work done.