ST Micro STNRG IC firmware
Budget: $30 – $250 USD
We are exploring the use of the ST Micro STNRG388A power conversion digital controller integrated circuit for a family of multi phase DC-DC converters from 2kW up to 600kW. We currently have four STEVAL-ISA164V1 evaluation boards available from both digikey and mouser that we need firmware coding support for.
The evaluation will grow in phases of increasing complexity.
The first phase of this firmware will generate 3 interleaving PWM outputs that vary from 1% to 99% . The output percentage would vary proportionaly to a single analog input voltage that will be provided to an analog input pin on the eval board. The switching frequency will be 250 Hz.
This first circuit will power up and then start putting out a set of 3 identical square waves (PWM outputs on digital pin) that are each phased 120 degrees apart. The PWM outputs will overlap and the duty cycle percentage will be proportional to an analog input voltage that is read in on one of the STNRG388 ADC input channels through one of the pins on the eval board.
The second phase firmware would allow the option of converting from 3 evenly space interleaved square waves 120 degrees apart to 4 interleaved square waves 90 degrees by reading the digital input on one of the GPIO pins. This pin will be read at start up and the board will always operate in that one configuration, this will not be required to change phase mode once powered up and operating. A low signal on the pin would designate 3 phases and a high signal could designate 4 phase operation.
The evaluation will grow in phases of increasing complexity.
The first phase of this firmware will generate 3 interleaving PWM outputs that vary from 1% to 99% . The output percentage would vary proportionaly to a single analog input voltage that will be provided to an analog input pin on the eval board. The switching frequency will be 250 Hz.
This first circuit will power up and then start putting out a set of 3 identical square waves (PWM outputs on digital pin) that are each phased 120 degrees apart. The PWM outputs will overlap and the duty cycle percentage will be proportional to an analog input voltage that is read in on one of the STNRG388 ADC input channels through one of the pins on the eval board.
The second phase firmware would allow the option of converting from 3 evenly space interleaved square waves 120 degrees apart to 4 interleaved square waves 90 degrees by reading the digital input on one of the GPIO pins. This pin will be read at start up and the board will always operate in that one configuration, this will not be required to change phase mode once powered up and operating. A low signal on the pin would designate 3 phases and a high signal could designate 4 phase operation.