Cadence Virtuoso tool
Budget: ₹1,500 – ₹12,500 INR
You whould be able to layout some basic CMOS logic gates. This requires familiarity with Cadence Virtuoso tool . It includes some widely used basic CMOS logic gates. The circuits to be laid out are described below
1. An INVERTER Use: (W/L)n = 1.0/0.045 and (W/L)p = 2.0/0.045
2. A 2-input NAND gate Use: (W/L)n = 2.0/0.045 and (W/L)p = 2.0/0.045
3. A 2-input NOR gate Use: (W/L)n = 1.0/0.045 and (W/L)p = 4.0/0.045
4. A 2-input XOR gate Use: (W/L)n = 2.0/0.045 and (W/L)p = 4.0/0.045
5. A complex gate F = (A+B)•(C+D) Use: (W/L)n = 2.0/0.045 and (W/L)p = 4.0/0.045
All circuits are to be laid out using Cadence Virtuoso.
1. An INVERTER Use: (W/L)n = 1.0/0.045 and (W/L)p = 2.0/0.045
2. A 2-input NAND gate Use: (W/L)n = 2.0/0.045 and (W/L)p = 2.0/0.045
3. A 2-input NOR gate Use: (W/L)n = 1.0/0.045 and (W/L)p = 4.0/0.045
4. A 2-input XOR gate Use: (W/L)n = 2.0/0.045 and (W/L)p = 4.0/0.045
5. A complex gate F = (A+B)•(C+D) Use: (W/L)n = 2.0/0.045 and (W/L)p = 4.0/0.045
All circuits are to be laid out using Cadence Virtuoso.