Digital Electronic Proffessional required immediately
Budget: $10 – $30 AUD
Professional and proficient in the following areas
Boolean Algebra and Logic Design
Number systems
Basic Theorems of Boolean Algebra
Canonical and Standard Forms
Logic Gate Implementations and Characteristics: propagation delays, logic levels and
compatibility.
Simplification of Boolean Functions
Prime Implicants, etc
Map and Tabulation Methods
Technology Mapping for Gate Arrays
Hazards in digital circuits.
Logic Components
Combinatorial Components
Adders/Subtracters
Logic and Arithmetic Units
Decoders/Selectors
Buses
Priority Encoders
Magnitude Comparators
Shifters and Rotators
Multipliers
Real world considerations
Programmable Logic Devices
Read Only Memory
Programmable Logic Arrays (PLAs)
Programmable Array Logic (PALs) Devices
Field Programmable Gate Arrays (FPGAs).
Synchronous Sequential Logic
Latches
Flip Flops
Finite-State Machine (FSM) Model
Synthesis and Analysis
Designing State Machines using State Diagrams
Designing State Machines using ASM (Algorithmic State Machine) Charts
State Minimisation, Optimisation and Timing.
Hardware Description Languages (VHDL)
Combinatorial descriptions
Delta Delays
VHDL hierarchy (Entities, modules, instantiation)
Language constructs (conditional assignment, selected assignment)
Synchronous descriptions (processes, if, case)
VHDL test benches
Synthesis considerations
Boolean Algebra and Logic Design
Number systems
Basic Theorems of Boolean Algebra
Canonical and Standard Forms
Logic Gate Implementations and Characteristics: propagation delays, logic levels and
compatibility.
Simplification of Boolean Functions
Prime Implicants, etc
Map and Tabulation Methods
Technology Mapping for Gate Arrays
Hazards in digital circuits.
Logic Components
Combinatorial Components
Adders/Subtracters
Logic and Arithmetic Units
Decoders/Selectors
Buses
Priority Encoders
Magnitude Comparators
Shifters and Rotators
Multipliers
Real world considerations
Programmable Logic Devices
Read Only Memory
Programmable Logic Arrays (PLAs)
Programmable Array Logic (PALs) Devices
Field Programmable Gate Arrays (FPGAs).
Synchronous Sequential Logic
Latches
Flip Flops
Finite-State Machine (FSM) Model
Synthesis and Analysis
Designing State Machines using State Diagrams
Designing State Machines using ASM (Algorithmic State Machine) Charts
State Minimisation, Optimisation and Timing.
Hardware Description Languages (VHDL)
Combinatorial descriptions
Delta Delays
VHDL hierarchy (Entities, modules, instantiation)
Language constructs (conditional assignment, selected assignment)
Synchronous descriptions (processes, if, case)
VHDL test benches
Synthesis considerations