CMOS Rectifier DRC and LVS Cleanup
Budget: ₹1,500 – ₹12,500 INR
I'm in need of a dedicated and skilled CAD engineer who can meticulously eliminate DRC (Design Rule Checking) and LVS (Layout VS Schematic) errors for a CMOS-based rectifier design project.
Project Requirements:
1. Familiarity with Cadence Virtuoso, as project design and layout software.
2. Ability to accurately clean up both DRC and LVS errors using Virtuoso.
3. A comprehensive understanding of pre-defined foundry design rules that is to be followed strictly.
Ideal Skills:
• Expert proficiency with Cadence Virtuoso
• In-depth understanding of Design Rule Checking (DRC) and Layout VS Schematic (LVS)
• Strong technical knowledge in CMOS-based circuit design
Clean, error-free designs are essential for successful device fabrication - I'm trusting you with this important task in my project. Your skill and attention to detail will be the key to meeting our objectives.
Project Requirements:
1. Familiarity with Cadence Virtuoso, as project design and layout software.
2. Ability to accurately clean up both DRC and LVS errors using Virtuoso.
3. A comprehensive understanding of pre-defined foundry design rules that is to be followed strictly.
Ideal Skills:
• Expert proficiency with Cadence Virtuoso
• In-depth understanding of Design Rule Checking (DRC) and Layout VS Schematic (LVS)
• Strong technical knowledge in CMOS-based circuit design
Clean, error-free designs are essential for successful device fabrication - I'm trusting you with this important task in my project. Your skill and attention to detail will be the key to meeting our objectives.