DQ200 UDS Diagnostic Test Bench

Job ID: 40399113

Budget: €1,500 – €3,000 EUR

Project Title: Professional Test Bench for DQ200 TCU (769E/769N) - UDS Protocol, Logic Implementation & Automated Validation
1. Project Overview
The goal of this project is to develop a complete hardware-software solution for a diagnostic and validation test bench for DQ200 (0AM/0CW) Transmission Control Units (TCU), specifically hardware versions 769E and 769N.
The system will interface with the TCU to control a 3-phase AC motor (via VFD) to simulate engine input speed. The project includes a Windows Desktop Application for manual control, automated test sequences with pass/fail logic, and professional PDF report generation.
2. Hardware Policy & Client Contributions
• Hardware Procurement: I (the client) will purchase all hardware components based on a mutual agreement with the selected freelancer.
• Hardware Preference: While the current baseline suggests using a Teensy 4.1, I am open to alternative hardware (e.g., ESP32, STM32) if the freelancer has a preferred platform that ensures stability.
• TCU State: I will provide 769E / 769N units with NO Component Protection and NO Immobilizer lock.
• Reverse Engineering Data: I will provide Sniffing Files (CAN Traces) containing communication logs between official diagnostic tools and the TCU.
• Freelancer Obligation: The freelancer must analyze the logs and implement the Checksum/CRC calculation logic and Rolling Counter for all data packets transmitted to the TCU.
3. Technical Specifications
A. Hardware Integration & Control
• Controller: Teensy 4.1 (or equivalent).
• Actuation: Control of a 3-phase AC Motor via a VFD using Modbus RTU (RS485) or 0-10V Analog.
• TCU Communication: * Physical Layer: High-speed CAN-Bus (500 kbps) with mandatory $120 \Omega$ termination.
o Transport Protocol: ISO-TP (ISO 15765-2).
o Application Protocol: UDS (ISO 14229).
• Protection: Implementation of Galvanic Isolation for CAN and USB interfaces to protect the host PC.
• Power & Speed Monitoring: * Monitor 12V supply voltage stability.
o Implementation of an independent RPM sensor (Hall/Encoder) for real-time speed validation.
B. Diagnostic & Protocol Implementation
• Protocol Analysis: Extract Data Identifiers (DIDs) and Routine Controls from the provided sniffing files.
• Checksum Logic: Implement the specific Checksum/CRC algorithm required by VAG for UDS payloads.
• Implement UDS Services: Session Control , Read/Write Data , Routine Control for Basic Settings, and Input/Output Control .
C. Safety & Failsafe
• Software Watchdog: A "Heartbeat" signal between the PC and the controller. If lost, the system must immediately shut down the motor and VFD.
• Emergency Abort: Automatic termination if critical parameters (Pressure, Temperature, Voltage, Speed deviation) exceed safety limits.
4. Software Interface & Automation Engine
A Windows Desktop Application (Python/PyQt or C#) featuring:
I. Manual & Automated Modes
• Manual Mode: Real-time control of Motor RPM and manual triggering of TCU functions.
• Automated Mode: Scriptable engine to run sequences (e.g., Pressure Build-up Test, Full Gear Cycle 1-7).
II. Decision Logic (Nominal vs. Measured)
• Threshold Definition: User-defined Nominal Values (Min/Max thresholds) for all parameters.
• Real-time Pass/Fail: Automatic flagging of each test step based on measured data.
• Calibration Module: Interface to apply offsets to sensors.
III. Automatic Reporting
• Report Generation: Professional PDF/CSV export.
• Content: TCU ID, Timestamp, Measured vs. Nominal table, Voltage stability log, Pass/Fail status, and high-resolution graphs for Pressure and RPM.
5. Deliverables
1. Firmware: Complete source code for the microcontroller.
2. PC Software: Source code and Executable for the Desktop App.
3. Schematics: Detailed wiring diagram including isolation and termination.
4. DIDs & Checksum Map: Documentation of the identified UDS addresses and the CRC algorithm used.
6. Candidate Requirements
• Expertise in CAN-Bus, ISO-TP, and UDS (ISO 14229).
• Reverse Engineering Skills: Ability to work with sniffing logs/CAN traces and identify CRC/Checksum algorithms.
• Proficiency with Teensy 4.1 or high-performance microcontrollers.
• Ability to design industrial-grade Fail-Safe logic and automated reporting.