Simulator for Out-of-Order Processor supporting speculative execution using register renaming
Budget: $30 – $250 USD
Simulator for Out-of-Order Processor supporting speculative execution using register renaming
Skills and Experience:
- Proficiency in C++
- Familiarity with out-of-order processor architecture
- Knowledge of speculative execution and register renaming
- Experience in simulator development
Project Description:
I am looking for a developer to create a simulator for an out-of-order processor that supports speculative execution using register renaming APEX-like ISA with an issue queue, a load-store queue and a reorder buffer that uses register renaming.. The simulator should be written in C and should not be designed for any specific operating system.
Key Requirements:
- The simulator should be able to support less than 100 instructions.
- It should accurately simulate the behavior of an out-of-order processor with support for speculative execution and register renaming.
- The simulator should provide detailed performance metrics and statistics.
Skills and Experience:
- Proficiency in C++
- Familiarity with out-of-order processor architecture
- Knowledge of speculative execution and register renaming
- Experience in simulator development
Project Description:
I am looking for a developer to create a simulator for an out-of-order processor that supports speculative execution using register renaming APEX-like ISA with an issue queue, a load-store queue and a reorder buffer that uses register renaming.. The simulator should be written in C and should not be designed for any specific operating system.
Key Requirements:
- The simulator should be able to support less than 100 instructions.
- It should accurately simulate the behavior of an out-of-order processor with support for speculative execution and register renaming.
- The simulator should provide detailed performance metrics and statistics.