STM32 Firmware Audit & Hardware Integration

Job ID: 40276391

Budget: $250 – $750 USD

Project Title: Code Audit & Hardware Integration for Phase 1 MedTech Prototype (STM32 + Python)
The Context:
We are a venture-backed MedTech startup building a medical device prototype. The system fuses Electromagnetic (EM) tracking (NDI Aurora) with A-Mode Ultrasound (GE Piezo crystals + TI TX7332 Pulser + ADS1256 ADC).
We have already architected the system and generated the V1.0 codebase. We need a Senior Embedded Engineer to perform a rigorous code audit, verify the hardware-timing logic, and map the C++ firmware to our custom PCB's pinout.
The Tech Stack:
1. Firmware: Bare-metal C++ on an STM32 microcontroller (using STM32Cube HAL).
2. PC Software: Python 3 (PySerial, pyigtl/OpenIGTLink) communicating with 3D Slicer.
Your Mandate (The Audit):
We are providing you with three fully written files: main.cpp, ads1256.cpp, and acuscope.py. We need you to verify the following critical failure points:
1. Timer Chaining & DMA Safety: Verify our STM32 logic. We are using Timer A to trigger a 100V pulser (2us pulse), chained to Timer B to wait 50us (dead-time), which then triggers an SPI Rx DMA burst from the ADS1256 (driven by an EXTI on the DRDY pin). Ensure this is truly non-blocking and won't crash the USB CDC stack.
2. Pin Mapping: Take the schematic/pinout document from our PCB designer, generate the STM32CubeIDE .ioc file, and integrate our C++ logic into it.
3. Python Math: Verify our Python script correctly unpacks the 3-byte little-endian USB packets, performs Envelope Detection, and executes the ToF (Time-of-Flight) equation (Distance = \frac{ToF \times 1540}{2}).
Deliverables:
1. A brief written risk assessment (What did we get wrong? What is risky?).
2. The final, compiled .bin or .hex file ready to be flashed to our custom PCB.
3. The verified Python scripts.
Requirements:
You must have deep experience with STM32 hardware timers, DMA, and SPI. If you understand basic acoustic/ultrasound pulse-echo physics, that is a massive plus.