PCB adapter design: JLCPCB Samtec CLM-110-02-H-D (C3320770) to 2.54mm 1×10 header (Raspberry Pi SPI breakout)
Budget: €30 – €250 EUR
Description:
I need a simple 2-layer PCB adapter designed and delivered as manufacturing files for JLCPCB.
Goal
Create a PCB that breaks out a 20-pin (2×10) 1.00mm pitch module connector to a 2.54mm 1×10 header for Dupont wires (Raspberry Pi wiring).
One side of the board is the Samtec connector, the opposite side is the 2.54mm header.
Board
2-layer FR-4
Board outline: 25 mm × 50 mm (around this value)
Place connectors on opposite short edges
Add clear silkscreen pin labels and a Pin-1 marker
Required Connector Parts (NO substitutions)
J1 (module connector):
Samtec CLM-110-02-H-D
JLCPCB Part # = C3320770 (must be used in BOM)
J2 (wire header):
1×10, 2.54mm male header (for Dupont wires)
Must be a specific part suitable for JLCPCB ordering (include Manufacturer + MPN in BOM)
Pin Mapping (must match exactly)
J2 pinout (silkscreen these labels):
3V3
GND
SCLK
MOSI
MISO
CS
DRDY
RST
EXT
NC (no connection)
J1 pin functions (must be wired exactly as listed):
J1-1 = SCLK
J1-2 = MISO
J1-3 = GND
J1-4 = GND
J1-5 = MOSI
J1-6 = CS
J1-7 = NC
J1-8 = GND
J1-9 = NC
J1-10 = 3V3
J1-11 = 3V3
J1-12 = 3V3
J1-13 = DRDY
J1-14 = EXT
J1-15 = GND
J1-16 = RST
J1-17..20 = NC (do not connect)
Required Passives (must be included)
R1–R4: 33Ω, 0603 series resistors on SCLK/MOSI/MISO/CS
R5: 10kΩ, 0603 pull-up from RST to 3V3
C1: 100nF, 0603 decoupling (3V3–GND)
C2: 10µF, 0805 decoupling (3V3–GND)
C1 and C2 must be placed close to J1 3V3/GND pins with short traces.
Required Net Connections
3V3: J2-1 ↔ J1-10/11/12 + C1/C2
GND: J2-2 ↔ J1-3/4/8/15 + C1/C2
SCLK: J2-3 → R1 → J1-1
MOSI: J2-4 → R2 → J1-5
MISO: J1-2 → R3 → J2-5
CS: J2-6 → R4 → J1-6
DRDY: J2-7 ↔ J1-13
RST: J2-8 ↔ J1-16 (R5 pull-up to 3V3)
EXT: J2-9 ↔ J1-14
J2-10 = NC (no copper)
DRC / Quality Requirements
All nets routed (Airwires = 0)
No DRC errors
J1 Pin-1 marker must match electrical pin 1 (SCLK)
Deliverables (JLCPCB-ready)
Gerber + Drill (ZIP)
BOM (CSV) including Designator, Value, Package, Manufacturer, MPN, and JLCPCB Part # for J1 = C3320770
Pick & Place / CPL (centroid)
Source project files (KiCad preferred, or Altium/Eagle)
Project budget - around 50-90 USD
I need a simple 2-layer PCB adapter designed and delivered as manufacturing files for JLCPCB.
Goal
Create a PCB that breaks out a 20-pin (2×10) 1.00mm pitch module connector to a 2.54mm 1×10 header for Dupont wires (Raspberry Pi wiring).
One side of the board is the Samtec connector, the opposite side is the 2.54mm header.
Board
2-layer FR-4
Board outline: 25 mm × 50 mm (around this value)
Place connectors on opposite short edges
Add clear silkscreen pin labels and a Pin-1 marker
Required Connector Parts (NO substitutions)
J1 (module connector):
Samtec CLM-110-02-H-D
JLCPCB Part # = C3320770 (must be used in BOM)
J2 (wire header):
1×10, 2.54mm male header (for Dupont wires)
Must be a specific part suitable for JLCPCB ordering (include Manufacturer + MPN in BOM)
Pin Mapping (must match exactly)
J2 pinout (silkscreen these labels):
3V3
GND
SCLK
MOSI
MISO
CS
DRDY
RST
EXT
NC (no connection)
J1 pin functions (must be wired exactly as listed):
J1-1 = SCLK
J1-2 = MISO
J1-3 = GND
J1-4 = GND
J1-5 = MOSI
J1-6 = CS
J1-7 = NC
J1-8 = GND
J1-9 = NC
J1-10 = 3V3
J1-11 = 3V3
J1-12 = 3V3
J1-13 = DRDY
J1-14 = EXT
J1-15 = GND
J1-16 = RST
J1-17..20 = NC (do not connect)
Required Passives (must be included)
R1–R4: 33Ω, 0603 series resistors on SCLK/MOSI/MISO/CS
R5: 10kΩ, 0603 pull-up from RST to 3V3
C1: 100nF, 0603 decoupling (3V3–GND)
C2: 10µF, 0805 decoupling (3V3–GND)
C1 and C2 must be placed close to J1 3V3/GND pins with short traces.
Required Net Connections
3V3: J2-1 ↔ J1-10/11/12 + C1/C2
GND: J2-2 ↔ J1-3/4/8/15 + C1/C2
SCLK: J2-3 → R1 → J1-1
MOSI: J2-4 → R2 → J1-5
MISO: J1-2 → R3 → J2-5
CS: J2-6 → R4 → J1-6
DRDY: J2-7 ↔ J1-13
RST: J2-8 ↔ J1-16 (R5 pull-up to 3V3)
EXT: J2-9 ↔ J1-14
J2-10 = NC (no copper)
DRC / Quality Requirements
All nets routed (Airwires = 0)
No DRC errors
J1 Pin-1 marker must match electrical pin 1 (SCLK)
Deliverables (JLCPCB-ready)
Gerber + Drill (ZIP)
BOM (CSV) including Designator, Value, Package, Manufacturer, MPN, and JLCPCB Part # for J1 = C3320770
Pick & Place / CPL (centroid)
Source project files (KiCad preferred, or Altium/Eagle)
Project budget - around 50-90 USD
Related categories:
Electronics
Microcontroller
Electrical Engineering
PCB Layout
Circuit Design
FPGA
Embedded Systems
Prototyping