c low level programming project

This project contains two parts: a) The cache memory simulator: The configurations of your cache simulator will be based on arguments given at the command line. They must include: - Total cache size. - Block size. - Associativity (direct-mapped, set-associative). - Unified vs. split I- and D-caches. - Write back vs. write through. - Write allocate vs. write no allocate. Moreover, your simulator must be capable of collecting and reporting multiple statistics which will be used to measure and evaluate the correctness of the simulator. For simplicity, your simulator should collect information that will help in measuring: hit rate and miss rate. b) The performance evaluation you will conduct using the simulator. Use the trace file to test your simulator and answer the following questions: - Explain the relationship between block size and hit rate. Support your answer by results (hit rate vs block size) you obtained using your simulator. - Explain the relationship between associativity and hit rate. Support your answer by results you obtained using your simulator.