VIVADO - FPGA- C++ - to gain HLS benefit -- 4
Budget: $30 – $250 USD
FPGA in Vivado (RSA and elecptic curve) croptography
implementing a modern cryptography algorithm ( Elliptic Curve ) and RSA-1024 bit in cloud computing environment using FPGA and VIVADO HLS software to synthesis C++ code. then compare between two methods in terms of performance and time with most recent research , the main aspect for the proposed work plan is as follow:
Generator to generate the keys based on the type of data then determines which method to use and key size for each method. Photos and video encrypted using Elliptic curve , text data encrypted using RSA. And select key size based on data type.
the selected method will base a suitable mathematical algorithm to implement each step and phase which Comply with VIVADO HLS.
Compare the result with the most recent references.(Analysis)
the cloud computing environment is as you want ( Amazon , cloud Hardware ( EC2 F1) ) .
It should tset the code in C++ and VHDL then compare them
with Accuracy and time
Vivado is belong to Xilinx and I do not need any implemantation so you can choos any chip or just do the test case the focus on simulation.
The Xilinx Vivado HLS tool is one of the available high-level synthesis tools in the market. The main idea behind Vivado HLS is transforming a language specification design,into an RTL designed by converting it into Verilog or VHDL to accelerate and optimize implementation of algorithms for FPGA boards.
implementing a modern cryptography algorithm ( Elliptic Curve ) and RSA-1024 bit in cloud computing environment using FPGA and VIVADO HLS software to synthesis C++ code. then compare between two methods in terms of performance and time with most recent research , the main aspect for the proposed work plan is as follow:
Generator to generate the keys based on the type of data then determines which method to use and key size for each method. Photos and video encrypted using Elliptic curve , text data encrypted using RSA. And select key size based on data type.
the selected method will base a suitable mathematical algorithm to implement each step and phase which Comply with VIVADO HLS.
Compare the result with the most recent references.(Analysis)
the cloud computing environment is as you want ( Amazon , cloud Hardware ( EC2 F1) ) .
It should tset the code in C++ and VHDL then compare them
with Accuracy and time
Vivado is belong to Xilinx and I do not need any implemantation so you can choos any chip or just do the test case the focus on simulation.
The Xilinx Vivado HLS tool is one of the available high-level synthesis tools in the market. The main idea behind Vivado HLS is transforming a language specification design,into an RTL designed by converting it into Verilog or VHDL to accelerate and optimize implementation of algorithms for FPGA boards.