Mixed-Signal Signal-Processing Circuit Design
Budget: ₹1,500 – ₹12,500 INR
I have a signal-processing task that calls for a mixed-signal approach: an analog front-end to condition the incoming signals and a microcontroller-based digital section to execute real-time algorithms and manage I/O.
Scope
You will take the concept from idea to production-ready files. That means schematic capture, PCB layout, component selection, and firmware hooks for the chosen microcontroller. The analog section must handle low-noise amplification, filtering, and ADC interfacing; the digital section will reside on a mid-range MCU and run simple C-level routines that I can expand later.
Key expectations
• Clean, simulation-verified schematics (SPICE or equivalent)
• PCB files plus Gerbers and pick-and-place output (Altium, KiCad, or similar—your choice)
• Fully annotated BOM with part numbers in current supply
• Minimal, well-documented firmware skeleton that shows ADC setup, DMA, and data handoff to processing stubs
• Clear test points and guidance for bench validation
Acceptance criteria
1. Board powered up and recognized by MCU debugger without rework.
2. Analog chain meets ±1 dB gain spec and <2 mVpp noise over 0–20 kHz.
3. ADC delivers continuous, loss-free samples to the firmware demo loop at the required rate.
Please outline your proposed toolchain, estimated component lead times, and any questions about the signal specs so we can lock requirements quickly and move to layout.
Scope
You will take the concept from idea to production-ready files. That means schematic capture, PCB layout, component selection, and firmware hooks for the chosen microcontroller. The analog section must handle low-noise amplification, filtering, and ADC interfacing; the digital section will reside on a mid-range MCU and run simple C-level routines that I can expand later.
Key expectations
• Clean, simulation-verified schematics (SPICE or equivalent)
• PCB files plus Gerbers and pick-and-place output (Altium, KiCad, or similar—your choice)
• Fully annotated BOM with part numbers in current supply
• Minimal, well-documented firmware skeleton that shows ADC setup, DMA, and data handoff to processing stubs
• Clear test points and guidance for bench validation
Acceptance criteria
1. Board powered up and recognized by MCU debugger without rework.
2. Analog chain meets ±1 dB gain spec and <2 mVpp noise over 0–20 kHz.
3. ADC delivers continuous, loss-free samples to the firmware demo loop at the required rate.
Please outline your proposed toolchain, estimated component lead times, and any questions about the signal specs so we can lock requirements quickly and move to layout.